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IEEE 754 Float Converter

A decimal number or raw bits (0x40490FDB) in half, single or double precision: sign, exponent, mantissa, exact stored value, rounding error, ULP, NaN.

The bit fields with the bias arithmetic, hex and binary, the value actually stored written out exactly, the shortest decimal that reads back to it, the error against what you typed, ULP and the next and previous floats.

Example: 3.14159 in single is 0x40490FD0, stored as 3.141590118408203125 (off by 1.18e-7, one ULP = 2.38e-7); 0.1 in double is 0x3FB999999999999A = 0.10000000000000000555…; 65504 is the largest half.

v0.1.0 · last reviewed 22 September 2026
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The bits, the bias,
and the exact value.

How a decimal becomes bits, what "exact" means, and how the special cases are read.

Encoding

Single and double precision use the platform's own conversion (Float32Array / Float64Array), which rounds to nearest, ties to even, as IEEE 754 requires; half precision is computed here bit by bit with the same rounding. The fields are sign, a biased exponent (bias 15, 127 or 1023) and a mantissa with an implicit leading 1 for normal numbers: value = (−1)^sign × 1.mantissa × 2^(exponent − bias).

Exact and shortest

The stored value is a dyadic rational (an integer times a power of two), so it has a finite decimal expansion; the page writes it out in full with integer arithmetic — that is how 0.1 in double becomes 0.1000000000000000055511151231257827021181583404541015625. The error line is the exact difference from what you typed. The shortest line is the fewest decimal digits that read back to the same bits, which is what languages print by default.

Special cases and neighbours

Exponent field all zeros: zero, or a subnormal (no implicit 1, precision shrinking towards zero). All ones: infinity when the mantissa is zero, otherwise NaN with a payload and a quiet/signalling bit. ULP is the gap to the next representable number at this magnitude; next and previous are the adjacent floats. Nothing leaves the browser; the same four anonymous usage counts as the rest of the site apply.

SOURCES

  • IEEE 754-2019 binary16 / binary32 / binary64 layouts (1 + 5 + 10, 1 + 8 + 23, 1 + 11 + 52 bits; biases 15, 127, 1023); round to nearest, ties to even; exact expansion by integer arithmetic

Last reviewed 22 September 2026. How results are checked: How we verify.